FUJITSU MICROELECTRONICS DATA SHEET
DS04-27247-3E
ASSP for Power Management Applications (Rechargeable battery)
DC/DC Converter IC of Synchronous Rectification for charging Li-ion battery
MB39A119
DESCRIPTION
The MB39A119 is the N-ch MOS drive of the synchronous rectification type DC/DC converter IC using pulsewidth modulation (PWM) type that can charge Li-ion battery from 1 cell to 4 cells and suitable for down-conversion. This IC integrates built-in comparator for the voltage detection of the AC adapter and switches the power supply to the AC adapter or battery automatically, enabling supply it to system. In addition, the constant voltage control state detection function is built in, which prevents mis-detecting the full charge. The MB39A119 provides a wide range of power supply voltage and low standby current, high efficiency, making it ideal for use as a built-in charge device in products such as notebook PC.
FEATURES
* * * * * * * * * * * * * * * * * High efficiency : 97 % (Max) High-frequency operation : 1 MHz (Max) Built-in off time control function Built-in voltage detection function of AC adapter (ACOK, XACOK terminal) Preventing mis-detection for the full charge by the constant voltage control state detection function (CVM terminal) Built-in two constant current control circuits Analog control of constant current value is possible ( + INE1, + INE2 terminal) Built-in output stage for N-ch MOS FET synchronous rectification Built-in charge stop function at low input voltage Output voltage setting accuracy : 4.2 V 0.74 % (Ta= - 10 C to + 85 C) Built-in high accuracy charge current detection amplifier : 4 % (At input voltage difference 100 mV with Voltage gain 24.5 (V/V) Built-in high accuracy input current detection amplifier : 3 % (At input voltage difference 100 mV with Voltage gain 25 (V/V) Arbitrary output voltage can be set by external resistor In IC standby mode, output voltage setting resistor is made to be open to prevent inefficient current loss Quiescent current : 1.9 mA (Typ) Standby current : 0 A (Typ) Package : QFN28
Copyright(c)2005-2008 FUJITSU MICROELECTRONICS LIMITED All rights reserved 2008.6
MB39A119
PIN ASSIGNMENT
(TOP VIEW)
28 VCC -INC1 +INC1 ACIN ACOK CVM +INE1 1 2 3 4 5 6 7 8
27
26
25
24
23
PGND
CB
VS
VB
22 21 20 19 18 17 16 15 CTL GND VREF RT CS OUTD -INE3
9
10
11
12
13
14
OUTC2
(LCC-28P-M12)
Note : Connect IC's radiation board at bottom side to potential of GND.
2
FB123
-INE1
+INE2
+INC2
-INC2
-INE2
XACOK
OUT-1
OUT-2
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MB39A119
PIN DESCRIPTION
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Pin Name VCC -INC1 + INC1 ACIN ACOK CVM + INE1 -INE1 OUTC2 + INC2 -INC2 + INE2 - INE2 FB123 -INE3 OUTD I/O I I I O O I I O I I I I O I Description Power supply terminal for reference voltage and control circuit. Input current detection amplifier (Current Amp1) input terminal. Input current detection amplifier (Current Amp1) input terminal. AC adapter voltage detection block (AC Comp.) input terminal. AC adapter voltage detection block (AC Comp.) output terminal. ACOK = L when ACIN = H, ACOK = Hi-Z when ACIN = L, ACOK = Hi-Z when CTL = L Constant voltage control state detection block (CV Comp.) output terminal. Error amplifier (Error Amp1) non-inverted input terminal. Error amplifier (Error Amp1) inverted input terminal. Charge current detection amplifier (Current Amp2) output terminal. Charge current detection amplifier (Current Amp2) input terminal. Charge current detection amplifier (Current Amp2) and low input voltage detection comparator (UV Comp.) input terminal. Error amplifier (Error Amp2) non-inverted input terminal. Error amplifier (Error Amp2) inverted input terminal. Error amplifier (Error Amp1, 2, 3) output terminal. Error amplifier (Error Amp3) inverted input terminal. This terminal is set to Hi-Z to prevent loss of current through the output voltage setting resistor when IC is standby mode. OUTD = Hi-Z when CTL = L OUTD = L when CTL = H Soft-start capacitor connection terminal. Triangular wave oscillation frequency setting resistor connection terminal. Reference voltage output terminal. Ground terminal. Power supply control terminal for DC/DC converter block. AC adapter voltage detection block (AC Comp.) output terminal. XACOK = Hi-Z when ACIN = H, XACOK = L when ACIN = L, XACOK = Hi-Z when CTL = L Ground terminal. External synchronous rectification side FET gate drive output terminal. Bias output terminal for output circuit. External main side FET source conneciton terminal. External main side FET gate drive output terminal. Boot strap capacitor connection terminal. The capacitor is connected between the CB terminal and the VS terminal.
16
O O I O O O O
17 18 19 20 21 22 23 24 25 26 27 28
CS RT VREF GND CTL XACOK PGND OUT-2 VB VS OUT-1 CB
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MB39A119
BLOCK DIAGRAM
ACIN 4 + - Hi Side Only 2.0 V + x25 - 100 k -INE1 8 +INE1 7 -INE2 13 OUTC2 9 + +INC2 10 -INC2 11 +INE2 12 FB123 14
x24.5
ACOK 5
XACOK 22
CVM 6 - + 2.6 V 0.1 V +
VCC 1
+INC1 3 -INC1 2
VB Reg.
5.0 V
25 VB
3.1 V -INC2 (VO)
- 5 28 CB
- +
+ Drive logic - -2.5 V -1.5 V
Drv-1
27 OUT-1 26 VS
Drv-2
24 OUT-2
- +
-
Off time Control 23 PGND H: UVLO, UV release
- + OUTD 16 4.2 V Slope Control
VCCUVLO VBUVLO VREFUVLO
-INE3 15
+ VREF 10 A CS 17 + + - 0.2 V +INC2 -INC2 (Vo) CT - 2.6 V OUTC2 0.3 V + - VCC 4.2 V bias [ VREF 5.0 V 18 RT 19 VREF 20 GND]
DC/DC ON/OFF
21 CTL
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MB39A119
ABSOLUTE MAXIMUM RATINGS
Parameter Power supply voltage CB terminal input voltage Control input voltage Symbol VCC VCB VCTL VINE Input voltage VINC1 VINC2 OUTD terminal output voltage ACIN input voltage ACOK terminal output voltage XACOK terminal output voltage CVM terminal output voltage Output current Power dissipation Storage temperature VOUTD VACIN VACOK VXACOK VCVM IOUT PD TSTG Ta +25 C Condition VCC terminal CB terminal CTL terminal + INE1, + INE2, - INE1, - INE2, - INE3 terminal + INC1, - INC1 terminal + INC2, - INC2 terminal OUTD terminal ACIN terminal ACOK terminal XACOK terminal CVM terminal Rating Min -55 Max 27 32 27 VCC + 0.3 VCC + 0.3 20 20 VCC 27 27 27 60 4400*1,*2 1900*1,*3 + 125 mW C Unit Unit V V V V V V V V V V V mA
*1 : The packages are mounted on the dual-sided epoxy board (10 cm x 10cm) . *2 : With connection of exposed pad and with thermal via. *3 : With connection of exposed pad and without thermal via. WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
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MB39A119
RECOMMENDED OPERATING CONDITIONS
Parameter Power supply voltage CB terminal input voltage Reference voltage output current Bias output current Symbol VCC VCB IREF IVB VINE Input voltage VINC1 VINC2 Input voltage difference OUTD terminal output voltage OUTD terminal output current CTL terminal input voltage ACIN input voltage ACOK terminal output voltage XACOK terminal output voltage CVM terminal output voltage Peak output current Oscillation frequency Timing resistor Soft-start capacitor CB terminal capacitor Bias output capacitor Reference voltage output capacitor Operating ambient temperature DVINC VOUTD IOUTD VCTL VACIN VACOK VXACOK VCVM IOUT fOSC RT CS CB CVB CREF Ta Condition VCC terminal CB terminal VREF terminal VB terminal + INE1, + INE2, - INE1, - INE2, - INE3 terminal + INC1, -INC1 terminal + INC2, -INC2 terminal Current detection voltage range OUTD terminal OUTD terminal CTL terminal ACIN terminal ACOK terminal XACOK terminal CVM terminal Duty 5 % (t=1/fOSC x Duty) RT terminal CS terminal CB terminal VB terminal VREF terminal Value Min 8 -1 -1 0 7 0 0 0 0 0 0 0 0 0 -1200 200 -30 Typ 500 39 0.22 0.1 1.0 0.1 +25 Max 25 30 0 0 5 VCC 19 140 19 2 25 VCC 25 25 25 +1200 1000 1.0 +85 Unit V V mA mA V V V mV V mA V V V V V mA kHz k F F F F C
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device's electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their representatives beforehand.
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ELECTRICAL CHARACTERISTICS
(VCC = 19 V, VB = 0 mA, VREF = 0 mA, Ta = +25 C) Parameter Output voltage Reference voltage block [REF] Input stability Load stability Short-circuit output current Threshold voltage Hysteresis width Under voltage Threshold voltage lockout protection circuit block Hysteresis width [UVLO] Threshold voltage Hysteresis width Soft-start block [SOFT] Triangular wave oscillator block [OSC] Charge current Oscillation frequency Frequency temperature stability Input offset voltage Input bias current Voltage gain Error amplifier block [Error Amp1] Frequency bandwidth Output voltage Output source current Output sink current * : Standard design value (Continued) Symbol VREF1 VREF2 Line Load Ios VTLH VTHL VH VTLH VTHL VH VTLH VTHL VH ICs Pin No. 19 19 19 19 19 1 1 1 25 25 25 19 19 19 17 Conditions Ta = +25 C Ta = -10 C to + 85 C VCC = 8 V to 25 V VREF = 0 mA to -1 mA VREF = 1 V VCC VCC VCC VB VB VB VREF VREF VREF RT = 39 k Ta = -30 C to + 85 C DC AV = 0 dB FB123 = 2 V FB123 = 2 V Value Min 4.963 4.95 -60 7.0 3.8 3.1 2.5 2.3 -14 450 -50 2.9 2.0 Typ 5.000 5.00 1 1 -30 7.5 7.4 0.1 4.0 3.3 0.7 2.7 2.5 0.2 -10 500 Max 5.037 5.05 10 10 -15 7.9 4.2 3.5 2.9 2.7 -6 550 5 0.9 -30 Unit V V mV mV mA V V V V V V V V V A kHz % mV nA dB MHz V V A mA
fosc f/fdt VIO IB AV BW VFBH VFBL ISOURCE ISINK
27
27
1*
7, 8 7, 8 7, 8, 14 7, 8, 14 14 14 14 14
1 -15 100* 1.2* 3.1 0.8 -60 4.0
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MB39A119
(VCC = 19 V, VB = 0 mA, VREF = 0 mA, Ta = +25 C) Parameter Input offset voltage Input bias current Error amplifier block [Error Amp2] Voltage gain Frequency bandwidth Output voltage Output source current Output sink current Threshold voltage Voltage gain Error amplifier block [Error Amp3] Frequency bandwidth Output voltage Output source current Output sink current OUTD terminal leak current OUTD terminal output ON resistance Current detection voltage Symbol Pin No. VIO IB AV BW VFBH VFBL ISOURCE ISINK VTH1 VTH2 AV BW VFBH VFBL ISOURCE ISINK ILEAK RON VOUTC1 VOUTC2 AV VIO IINC1 Input current Frequency bandwidth Output voltage Output source current Output sink current * : Standard design value (Continued) 8 DS04-27247-3E IINC2 BW VOUTCH VOUTCL ISOURCE ISINK 12, 13 12, 13 12, 13, DC 14 12, 13, AV = 0dB 14 14 14 14 14 FB123 = 2 V FB123 = 2 V FB123 = 2 V, Ta = -10 C to + 85 C Conditions Value Min -50 2.9 2.0 Typ 1 -15 100* 1.2* 3.1 0.8 -60 4.0 Max 5 0.9 -30 Unit mV nA dB MHz V V A mA V V dB MHz V V A mA A V V
14, 15 FB123 = 2 V 14, 15
4.179 4.200 4.221 4.169 4.200 4.231 2.9 2.0 100* 1.2* 3.1 0.8 -60 4.0 0 35 2.5 0.5 25 20 0 3.0* 4.0 0.04 -1.2 200 0.9 -30 1 50 2.575 0.575
14, 15 DC 14, 15 AV = 0 dB 14 14 14 14 16 16 8 8 2, 3, 8 2, 3, 8 2, 3 2, 3 FB123 = 2 V FB123 = 2 V OUTD = 19 V OUTD = 1 mA
+ INC1 = - INC1 = 7 V to 19 V, 2.425 VIN = 100 mV + INC1 = - INC1 = 7 V to 19 V, 0.425 VIN = 20 mV + INC1 = - INC1 = 7 V to 19 V, 24.25 VIN = 100 mV + INC1 = - INC1 = 7 V to 19 V + INC1 = - INC1 = 7 V to 19 V + INC1 = - INC1 = 7 V to 19 V, CTL = 0 V -INE1 = 2 V -INE1 = 2 V -3 3.7 100
Voltage gain Current detection amplifier block [Current Amp1] Input offset voltage
25.75 V/V +3 30 1 0.2 -0.6 mV A A MHz V V mA A
2, 3, 8 AV = 0 dB 8 8 8 8
MB39A119
(VCC = 19 V, VB = 0 mA, VREF = 0 mA, Ta = +25 C) Parameter Symbol Pin No. VOUTC1 VOUTC2 VOUTC3 VOUTC4 Voltage gain Current detection amplifier block [Current Amp2] Input offset voltage AV VIO I+INCH Input current I-INCH IINCL Frequency bandwidth Output voltage Output source current Output sink current PWM comparator block [PWM Comp.] Output block [Drv-1, 2] Under input voltage detection comparator block [UV Comp.] BW VOUTCH VOUTCL ISOURCE ISINK VTL Threshold voltage VTH ROH ROL VTLH VTHL 9 9 9 9 9, 10, 11 Conditions + INC2 = - INC2 = 3 V to 19 V, VIN = 100 mV + INC2 = - INC2 = 3 V to 19 V, VIN = 20 mV + INC2 = - INC2 = 0 V to 3 V, VIN = 100 mV + INC2 = - INC2 = 0 V to 3 V, VIN = 20 mV Value Min 2.38 0.44 2.24 0.30 Typ 2.48 0.52 2.45 0.5 24.5 +1.5 30 0.1* -200 3.0* 4.2 0.04 -1.2 200 1.5 2.5 4 1 12.8 12.7 Max 2.58 0.60 2.66 0.70 Unit V V V V
Current detection voltage
+ INC2 = - INC2 = 3 V to 19 V, 23.76 VIN = 100 mV + INC2 = - INC2 = 3 V to 19 V, VIN = 100 mV + INC2 = - INC2 = 3 V to 19 V, VIN = 100 mV + INC2 = - INC2 = 0 V
25.24 V/V +4.5 45 0.2 -0.6 7 3.5 13.0 12.9 mV A A A MHz V V mA A V V V V
9, 10, 11 + INC2 = - INC2 = 3 V to 19 V -1.5 10 11 10, 11 -300 OUTC2 = 2 V OUTC2 = 2 V Duty cycle = 0% Duty cycle = 100% 3.9 100 12.6 12.5
9, 10, 11 AV = 0 dB 9 9 9 9 14 14
Output ON resistance Threshold voltage
24, 27 OUT-1, OUT-2 = -100 mA 24, 27 OUT-1, OUT-2 = 100 mA 11 11 -INC2 = 12.6 V -INC2 = 12.6 V
Hysteresis width
VH
11
0.1
V
* : Standard design value (Continued)
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MB39A119
(Continued) (VCC = 19 V, VB = 0 mA, VREF = 0 mA, Ta = +25 C) Parameter Overcurrent detection block [Over Current Det.] Symbol Pin No. Conditions Value Min Typ Max Unit
Threshold voltage
VTLH
11
-INC2 = 12.6 V
12.75
12.8
12.85
V
Threshold voltage Hysteresis width AC adapter voltage detection block [AC Comp.] ACOK terminal output leak current ACOK terminal output ON resistance XACOK terminal output leak current XACOK terminal output ON resistance Constant voltage control state detection block [CV Comp.] Threshold voltage Hysteresis width CVM terminal output leak current CVM terminal output ON resistance CS threshold voltage
VTLH VTHL VH ILEAK RON ILEAK RON VTLH VTHL VH ILEAK RON VTLH VTHL VH VTLH VTHL VH VB Load VON VOFF ICTLH ICTLL ICCS ICC
4 4 4 5 5 22 22 14 14 14 6 6 17 17 17 9 9 9 25 25 21 21 21 21 1 1
ACOK = 25 V ACOK = 1 mA XACOK = 25 V XACOK = 1 mA CVM = 25 V CVM = 1 mA VB = 0 mA to - 10 mA IC operating state IC standby state CTL = 5 V CTL = 0 V CTL = 0 V CTL = 5 V
2.056 1.959 2.55 2.50 0.35 0.25 4.9 2 0
2.12 2.02 0.1 0 200 0 200 2.7* 2.6* 0.1* 0 200 2.6 2.55 0.05 0.4 0.3 0.1 5.0 10 25 0 0 1.9
2.184 2.081 1 400 1 400 1 400 2.65 2.60 0.45 0.35 5.1 50 25 0.8 40 1 10 2.9
V V V A A V V V A V V V V V V V mV V V A A A mA
Synchronous rectification Hysteresis width control block [Synchronous Light load detection threshold voltage Cnt.] Hysteresis width Bias voltage block [VB] Output voltage Load stability CTL input voltage Input current General Standby current Power supply current
Control block [CTL]
* : Standard design value 10 DS04-27247-3E
MB39A119
TYPICAL CHARACTERISTICS
Power Supply Current vs. Power Supply Voltage Power supply current ICC (mA) Reference voltage VREF (V)
6 5 4 3 2 1 0 0 5 10 15 20 25 Ta = +25 C CTL = 5 V
Reference Voltage vs. Power Supply Voltage
6 5 4 3 2 1 0 0 5 10 15 20 25 Ta = +25 C CTL = 5 V VREF = 0 mA
Power supply voltage VCC (V)
Power supply voltage VCC (V)
Reference Voltage vs. Load Current Reference voltage VREF (V)
6 5 4 3 2 1 0 0 5 10 15 20 25 30 35 Ta = +25 C VCC = 19 V CTL = 5 V
Reference Voltage vs. Operating Ambient Temperature
5.08
Reference voltage VREF (V)
5.06 5.04 5.02 5.00 4.98 4.96 4.94 4.92 -40 -20 0 20 40
VCC = 19 V CTL = 5 V
60
80
100
Load current IREF (mA)
Operating ambient temperature Ta ( C) Error Amplifier Threshold Voltage vs. Operating Ambient Temperature Error amplifier threshold voltage VTH (V) Reference voltage VREF (V)
4.25 4.24 4.23 4.22 4.21 4.20 4.19 4.18 4.17 4.16 4.15 -40 -20 0 20 40 60 80 100 VCC = 19 V CTL = 5 V
CTL Terminal Current, Reference Voltage vs. CTL Terminal Voltage CTL terminal current ICTL (A)
1000 900 800 700 600 500 400 300 200 100 0 0 5 10 15 20 ICTL VREF Ta = +25 C VCC = 19 V VREF = 0 mA 10 9 8 7 6 5 4 3 2 1 0 25
CTL terminal voltage VCTL (V)
Operating ambient temperature Ta ( C) (Continued)
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MB39A119
Triangular Wave Oscillation Frequency vs. Operating Ambient Temperature Triangular wave oscillation frequency fOSC (kHz)
VCC = 19 V CTL = 5 V RT = 39 k
Triangular Wave Oscillation Frequency vs. Timing Resistor Triangular wave oscillation frequency fOSC (kHz)
10000 Ta = +25 C VCC = 15 V CTL = 5 V
580 560 540 520 500 480 460 440 420 -40 -20 0 20 40 60 80 100
1000
100 1 10 100 1000
Operating ambient temperature Ta ( C)
Timing Resistor RT (k)
Error Amplifier Gain, Phase vs. Frequency (ERR1, 2)
50 40 30 20 10 0 -10 -20 -30 -40 -50 100 Ta = +25 C Av 225 180 135 90 45 0 -45 -90 -135 -180 -225 10M VCC = 19 V
Phase (degree)
Gain AV (dB)
10 k 10 k IN 1 F 2.4 k +
4.2 V 240 k
8 (13) 7 (12)
- + 14
OUT
10 k
10 k Error Amp1 (Error Amp2)
1k
10k
100k
1M
Frequency f (Hz)
Error Amplifier Gain, Phase vs. Frequency (ERR3)
50 40 30 20 10 0 -10 -20 -30 -40 -50 100 Ta = +25 C Av 225 180 135 90 45 0 -45 -90 -135 -180 -225 10M VCC = 19 V
Phase (degree)
Gain AV (dB)
10 k IN 1 F 2.4 k + 15
240 k
- + 14
OUT
10 k
4.2 V Error Amp3
1k
10k
100k
1M
Frequency f (Hz) (Continued)
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(Continued) Current Detection Amplifier Gain, Phase vs. Frequency
50.0 40.0 30.0 20.0 10.0 0.0 -10.0 -20.0 -30.0 -40.0 -50.0 Ta = +25 C Av 225 180 135 90 45 0 -45 -90 -135 -180 -225 10M VCC = 19 V +INC1 -INC1 3 2 + x 25 - -INE1 8 OUT
Phase (degree)
Gain AV (dB)
Current Amp1 19 V 18.95 V
1k
10k
100k
1M
Frequency f (Hz)
Current Detection Amplifier Gain, Phase vs. Frequency
50.0 40.0 30.0 20.0 10.0 0.0 -10.0 -20.0 -30.0 -40.0 -50.0 Ta = +25 C Av 225 180 135 90 45 0 -45 -90 -135 -180 -225 10M VCC = 19 V
Phase (degree)
Gain AV (dB)
10 -INC2 11
+INC2
+ x 24.5 -
OUTC2 9 OUT
Current Amp2 12.6 V 12.55 V
1k
10k
100k
1M
Frequency f (Hz)
Power Dissipation vs. Operating Ambient Temperature
5000 QFN-24 (with thermal via)
Power dissipation PD (mW)
4500 4400 4000 3500 3000 2500 2000 1900 1500 1000 500 0 -50
QFN-24 (without thermal via)
-25
0
25
50
75
100
125
Operating ambient temperature Ta ( C)
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MB39A119
FUNCTION DESCRIPTION
1. DC/DC Converter Block
(1) Reference voltage block (REF) The reference voltage circuit uses the voltage supplied from the VCC terminal (pin 1) to generate a temperature compensated, stable voltage (5.0 V Typ) used as the reference power supply voltage for the IC's internal circuitry. This block can also be used to obtain a load current to a maximum of 1 mA from the reference voltage VREF terminal (pin 19) . (2) Triangular wave oscillator block (OSC) The triangular wave oscillator block has built-in capacitor for frequency setting and generates the triangular wave oscillation waveform by connecting the triangular wave oscillation frequency setting resistor with the RT terminal (pin 17) . The triangular wave is input to the PWM comparator circuits on the IC. (3) Error amplifier block (Error Amp1) This amplifier detects the output signal from the current detection amplifier (Current Amp1) , compares this to the +INE1 terminal (pin 7) , and outputs a PWM control signal to be used in controlling the charge current. In addition, an arbitrary loop gain can be set up by connecting a feedback resistor and capacitor between the FB123 terminal (pin 14) and -INE1 terminal (pin 8) , providing stable phase compensation to the system. (4) Error amplifier block (Error Amp2) This amplifier detects the output signal from the current detection amplifier (Current Amp2) , compares this to the +INE2 terminal (pin 12) , and outputs a PWM control signal to be used in controlling the charge current. In addition, an arbitrary loop gain can be set up by connecting a feedback resistor and capacitor between the FB123 terminal (pin 14) and -INE2 terminal (pin 13) , providing stable phase compensation to the system. (5) Error amplifier block (Error Amp3) This error amplifier (Error Amp3) detects the output voltage from the DC/DC converter and outputs the PWM control signal. External output voltage setting resistors can be connected to the error amplifier inverted input terminal to set the desired level of output voltage from 1 cell to 4 cells. In addition, an arbitrary loop gain can be set by connecting a feedback resistor and capacitor from the FB123 terminal (pin 14) to the -INE3 terminal (pin 15) of the error amplifier, enabling stable phase compensation to the system. (6) Current detection amplifier block (Current Amp1) The current detection amplifier (Current Amp1) detects a voltage drop which occurs between both ends of the output sense resistor (RS2) due to the flow of the AC adapter current, using the +INC1 terminal (pin 3) and -INC1 terminal (pin 2) . The AC adapter current control signal is amplified to 25 times and output to the inverse input terminal of Error Amp1 through the internal 100 k. This amplifier cannot use for detecting the charge current. (7) Current detection amplifier block (Current Amp2) The current detection amplifier (Current Amp2) detects a voltage drop which occurs between both ends of the output sense resistor (RS1) due to the flow of the charge current, using the +INC2 terminal (pin 10) and -INC2 terminal (pin 11) . The signal amplified to 24.5 times is output to the OUTC2 terminal (pin 9) . (8) PWM comparator block (PWM Comp.) The PWM comparator circuit is a voltage-pulse width converter for controlling the output duty of the error amplifiers (Error Amp1 to Error Amp3) depending on their output voltage. The PWM comparator circuit compares with either of low voltages between the triangular wave voltage generated by the triangular wave oscillator and the error amplifier output voltage, turns on the main side output transistor 14 DS04-27247-3E
MB39A119
and turns off on the synchronous rectification side output transistor, during the interval in which the triangular wave voltage is lower than the error amplifier output voltage. (9) Output block (Drv-1, 2) The output circuit uses a CMOS configuration capable of driving an external N-ch MOS FET both main side and synchronous rectification side. (10) Control block (CTL) Setting the CTL terminal (pin 21) "L" level places in the standby mode. CTL function table CTL L H Power OFF (Standby) ON (Active) OUTD Hi-Z L
(11) Bias voltage block (VB) Bias voltage block outputs 5 V (Typ) for the power supply of the output circuit and for setting the bootstrap voltage. (12) Off time control block (Off time Control) When MB39A119 operates by high on-duty, voltage difference of both ends of boot strap capacitor CB is decreasing gradually. In such the case, off time control block charges with CB by compulsorily generating off time (0.3 s Typ) . (13) Overcurrent detection block (Over Current Det.) Overcurrent detection block detects the 0.2 V (Typ) or more potential difference between +INC2 terminal (pin 10) and -INC2 terminal (pin 11) . When excessive current flows to the charge direction due to load-sudden change, it determines the overcurrent, makes CS terminal (pin 17) "L" level, and makes the on duty 0 %. After finishing the overcurrent, MB39A119 restarts with the soft-start operation. (14) Synchronous rectification control block (Synchronous Cnt.) CS terminal (pin 17) and 2.6 V (Typ) are compared. Output OUT-2 terminal (pin 24) for synchronous rectification side FET drive in the soft-start is fixed at "L" level. Output OUTC2 terminal of current detection amplifier block (Current Amp2) (pin 9) and 0.3 V (Typ) are compared, and output OUT-2 terminal (pin 24) for synchronous rectification side FET drive is fixed at "L" level at light-load.
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2. Protection Function
(1) Under voltage lockout protection circuit block (VREF-UVLO) A momentary decrease in internal reference voltage (VREF) may cause malfunctions in the control IC, resulting in breakdown or degradation of the system. To prevent such malfunction, the under voltage lockout protection circuit detects internal reference voltage drop and fixes the OUT-1 terminal (pin 27) and the OUT-2 terminal (pin 24) to the "L" level. The system restores voltage supply when the internal reference voltage reaches the threshold voltage of the under voltage lockout protection circuit. Protection circuit (VREF-UVLO) operation function table When UVLO is operating (VREF voltage is lower than UVLO threshold voltage) , the logic of the following terminal is fixed. OUTD OUT-1 OUT-2 CS VB Hi-Z L L L L
(2) Under voltage lockout protection circuit block (VCC-UVLO, VB-UVLO) The transient state or a momentary decrease in power supply voltage, which occurs when the bias voltage (VB) for output circuit is turned on, may cause malfunctions in the control IC, resulting in breakdown or degradation of the system. To prevent such malfunction, the under voltage lockout protection circuit detects a bias voltage drop and fixes the OUT-1 terminal (pin 27) and the OUT-2 terminal (pin 24) to the "L" level. The system restores voltage supply when the power supply voltage or internal reference voltage reaches the threshold voltage of the under voltage lockout protection circuit. Protection circuit (VCC-UVLO, VB-UVLO) operation function table When UVLO is operating (VCC voltage or VB voltage is lower than UVLO threshold voltage) , the logic of the following terminal is fixed. OUT-1 OUT-2 CS L L L
(3) Under input voltage detection comparator block (UV Comp.) VCC terminal (pin 1) voltage and -INC2 terminal (pin 11) voltage are compared, and VCC voltage is lower than the battery voltage +0.1 V (Typ) and fixes the OUT-1 terminal (pin 27) and OUT-2 terminal (pin 24) to the "L" level. The system restores voltage supply when the input voltage reaches the threshold voltage of the under input voltage detection comparator. Protection circuit (UV Comp.) operation function table When under input voltage is detected (Input voltage is lower than UV Comp. threshold voltage) , the logic of the following terminal is fixed. OUT-1 OUT-2 CS L L L
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MB39A119
3. Detection Functions
(1) AC adapter voltage detection block (AC Comp.) When ACIN terminal (pin 4) voltage is lower than 2.0 V (Typ) , AC adapter voltage detection block (AC Comp.) outputs "Hi-Z" level to the ACOK terminal (pin 5) and outputs "L" level to the XACOK terminal (pin 22) . When CTL terminal (pin 21) is set to "L" level, ACOK terminal (pin 5) and XACOK terminal (pin 22) are fixed to "Hi-Z" level. AC adapter detection function table The logic of the following terminal is fixed according to the connection state of the AC adapter. ACIN ACOK XACOK H L L Hi-Z Hi-Z L
(2) Constant voltage control state detection block (CV Comp.) When CV Comp. detects that the FB123 terminal (pin 14) voltage of the error amplifier (Error Amp3) output terminal becomes 2.6 V (Typ) or less, "L" level is output to constant voltage control state detection block output terminal CVM terminal (pin 6) . Charge control state function table Error Amp3 output (FB123) > 2.6 V 2.6 V CVM Hi-Z L Status Constant current control Constant voltage control
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MB39A119
CONSTANT CHARGING VOLTAGE AND CURRENT OPERATION
The MB39A119 is DC/DC converter IC with the pulse width modulation method (PWM method) . In the output voltage control loop, the output voltage of the DC/DC converter is detected, and the Error Amp3 compares internal reference voltage 4.2 V and DC/DC converter output to output the PWM controlled signal. In the charging current control loop, the voltage drop generated at both ends of charging current sense resistor (RS1) is sensed by +INC2 terminal (pin 10) , -INC2 terminal (pin 11) of Current Amp2, and the signal is output to OUTC2 terminal (pin 9) , which is amplified by 24.5 times. Error Amp2 compares the OUTC2 terminal (pin 9) voltage, which is the output of Current Amp2, and +INE2 terminal (pin 12) to output the PWM control signal, and it regulates the charging current. In AC adapter current control loop, the voltage drop generated at both ends of AC adapter current sense resistor (RS2) is sensed by +INC1 terminal (pin 3) , -INC1 terminal (pin 2) of Current Amp1, and the signal is output to -INE1 terminal (pin 8) , which is amplified by 25 times. Error Amp1 compares -INE1 terminal (pin 8) voltage, which is output of Current Amp1, and +INE1 terminal (pin 7) to output PWM controlled signal, and it limits the charging current due to the AC adapter current not to exceed the setting value. The PWM comparator compares the triangular wave to the smallest terminal voltage among the Error Amplifier output voltage (Error Amp1 to Error Amp3) . And the triangular wave voltage generated by the triangular wave oscillator. When the triangular wave voltage is smaller than the error amplifier output voltage, the main side output transistor is turned on and the synchronous rectification side output transistor is turned off.
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SETTING THE CHARGE VOLTAGE
The charge voltage (DC/DC output voltage) can be set by connecting external output voltage setting resistors (R1 and R2) to the -INE3 terminal (pin 15) . Be sure to select a resistor value that allows you to ignore the onresistance (35 at 1 mA) of internal FET connected to the OUTD terminal (pin 16). Battery charge voltage : VO VO (V) = R1 + R2 R2 x - INE3 (V)
B VO
R1
-INE3
15
- + 16
R2
4.2 V
OUTD
SETTING THE CHARGE CURRENT
The charge current value can be set at the analog voltage value of the +INE2 terminal (pin 12) . Charge current formula : Ichg (A) = + INE2 (V) 24.5 x RS1 ()
Battery charge current setting voltage : + INE2 + INE2 (V) = 24.5 x Ichg (A) x RS1 () It is recommended that the filter should be connected to an input terminal of Current Amp2 as shown below in order to reduce the switching noise and increase the charge current accuracy.
Ichg RS1
10 0.22 F 0.22 F
10
+INC2 -INC2
10 11 x 24.5
- +
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MB39A119
SETTING THE INPUT CURRENT
The input limit current value can be set at the analog voltage value of the +INE1 terminal (pin 7) . Input current formula : IIN (A) = Input current setting voltage : + INE1 + INE1 (V) = 25 x IIN (A) x RS2 () + INE1 (V) 25 x RS2 ()
SETTING THE OVERCURRENT DETECTION VALUE
The overcurrent is detected when the voltage difference is more than 0.2 V (Typ) between +INE2 terminal (pin 10) voltage and -INE2 terminal (pin 11) voltage. Charge overcurrent detection value : Iocdet (A) = 0.2 (V) RS1 ()
Charge current and overcurrent detection value by RS1 value (example) +INE2 Ichg RS1 33 m 15 m 0.5 V to 3.5 V 0.5 V to 3.5 V 0.6 A to 4.2 A 1.3 A to 9.3 A
OCDet 6A 13 A
SETTING THE TRIANGULAR WAVE OSCILLATION FREQUENCY
The triangular wave oscillation frequency can be set by the timing resistor (RT) connected to the RT terminal (pin 18) . Triangular wave oscillation frequency : fOSC 19500 fosc (kHz) = : RT (k)
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SETTING THE SOFT-START TIME
To prevent rush current at start-up of IC, the soft-start time can be set by connecting soft-start capacitor (CS) to the CS terminal (pin 17) . When the CTL terminal (pin 21) is set to "H" level and IC is started (VCC UVLO threshold voltage) , external soft-start capacitor (CS) connected to the CS terminal (pin 17) is charged at 10 A. ON duty depends PWN comparator output, which compares the FB123 terminal (pin 14) voltage and the triangular wave oscillator output voltage. During soft-start, FB123 terminal (pin14) voltage increases with sum voltage of CS terminal (pin 17) and diode voltage. Therefore, the output voltage of the DC/DC converter and current increase can be set by output ON duty in proportion to rise of the CS terminal (pin 17) voltage. The ON duty is affected by the ramp voltage of FB123 terminal (pin 14) until an output voltage of one Error Amp reaches the DC/DC converter loop controlled voltage. Soft-start time is obtained from the following formula. : Soft-start time : tS (time to output on duty 80 %) ts (s) = 0.13 x CS (F) :
* Soft-start timing chart
CT FB123 CS CS
FB123 CT
0v
OUT-1
0v
OUT-1
VO
Error Amp3 threshold voltage
VO
0v
IO
0A
IO
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TRANSIENT RESPONSE AT LOAD-STEP
The constant voltage control loop and the constant current control loop are independent. With the load-step, these two control loops change. The battery voltage and current overshoot are generated by the delay time of the control loop when the mode changes. The delay time is determined by phase compensation constant. When the battery is removed if the charge control is switched from the constant current control to the constant voltage control, and the charging voltage does overshoot by generating the period controlled with high duty by output setting voltage. The excessive voltage is not applied to the battery because the battery is not connected. When the battery is connected if the charge control is switched from the constant voltage control to the constant current control, and the charging current does overshoot by generating the period controlled with high duty by output setting voltage. The battery pack manufacturer in Japan thinks not the problem the current overshoot of 10ms or less. * Operation at step-load
Error Amp3 Output
Error Amp2 Output
Error Amp2 Output
Error Amp3 Output
Constant Current
Constant Voltage
Constant Current
Battery Voltage
Battery Current
When charge control switches from the constant current control to the constant voltage control, the voltage does overshoot by generating the period controlled with high duty by output setting voltage.
The battery pack manufacturer in Japan thinks not the problem the current overshoot of 10ms or less.
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AC ADAPTER DETECTION FUNCTION
When ACIN terminal (pin 4) voltage is lower than 2.0 V (Typ) , AC adapter voltage detection block (AC Comp.) outputs "Hi-Z" level to the ACOK terminal (pin 5) and outputs "L" level to the XACOK terminal (pin 22) . When CTL terminal (pin 21) is set to "L" level, ACOK terminal (pin 5) and XACOK terminal (pin 22) are fixed to "Hi-Z" level. (1) AC adapter presence The presence of AC adapter can be easily detected because the signal is output from the ACOK terminal (pin 5) to microcomputer etc. In this case, if CTL terminal (pin 21) is set in "L" level, IC become the standby state (ICC = 0 A Typ) .
* Connection example of detecting AC adapter presence
AC adapter ACIN 4
+ -
Micon ACOK 5 22 XACOK
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MB39A119
(2) Automatic changing system power supply between AC adapter and battery The AC adapter voltage is detected, and the external switch at input side and battery side is changed automatically with the connection as follows. Connect CTL terminal (pin 21) to VCC terminal (pin 1) for this function. OFF duty cycle becomes 100 % when CS terminal (pin 17) voltage is made to be 0 V, if it is needed after full charge. * Connection example of automatic changing system power supply between AC adapter and battery
System
AC adapter ACIN 4 + - 5 ACOK 22 XACOK Battery
VCC 1 CTL 21 VREF 10 A CS Micon Micon 17
(3) Battery selector function When control signal from microcomputer etc. is input to ACIN terminal (pin 4) below, ACOK terminal (pin 5) output voltage and XACOK terminal (pin 22) output voltage are controlled to select one of the two batteries for charge. Connect CTL terminal (pin 21) to VCC terminal (pin 1) for this function. OFF duty cycle becomes 100 % when CS terminal (pin 17) voltage is made to be 0 V, if it is needed after full charge. * Connection example of battery selector function
System AC adapter ACIN + - ACOK XACOK A Ichg RS1 B
4
5
22
VCC CTL
1 21 VREF 10 A
Battery1
Battery2
Micon
CS
17
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PHASE COMPENSATION
Circuit example of phase compensation is shown below. * Circuit example of phase compensation
VIN RS2 15 m
VCC -INE3 - + Cc Rc FB123 4.2 V -2.5 V -1.5 V VH
Bias Voltage (VCC-6V)
+ -
Drive
OUT Lo RL l1 VBATT RS1 33 m VH Co Rin1 Rin2 Ro
ESR
OSC
Lo : Inductance RL : Equivalent series resistance of inductance Co : Capacity of condenser ESR : Equivalent series resistance of condenser Ro : Load resistance
* Method to obtain frequency characteristic of LC filter
Frequency characteristic of power output LC filter (DC gain is included.)
90 80 70 60 50 40 30 20 10 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 160 gain phase 140 120 180
Cut-off frequency
f1 (Hz) = 2
Phase [deg]
1 Lo x Co x (Ro + ESR) (Ro + RL)
Gain
Phase
100 80 60 40 20 0 -20 -40 -60 -80 -100 -120 -140 -160 -180
Gain [dB]
Lo = 15 H Co = 14.1 F Ro = 4.2 RL = 30 m ESR = 100 m
1
10
100
1k
10k
100k
1M
10M
Frequency [Hz]
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MB39A119
* Method to obtain frequency characteristic of Error Amp
Total frequency characteristic
90 80 70 60 50 40 30 20 10 0 -10 -20 -30 -40 -50 -60 -70 -80 -90
total gain AMP Open Loop Gain total phase
Gain [dB]
Gain Phase
180 160 140 120 100 80 60 40 20 0 -20 -40 -60 -80 -100 -120 -140 -160 -180
Cut-off frequency
f2 (Hz) =
Phase [deg]
1 2 x Rc x Cc
Rc = 150 k Cc = 3300 pF
1
10
100
1k
10k
100k
1M
Frequency [Hz]
* Method to obtain frequency characteristic of DC/DC converter
Total frequency characteristic
90 80 70 60 50 40 30 20 10 0 -10 -20 -30 -40 -50 -60 -70 -80 -90
total gain AMP Open Loop Gain total phase
Gain
Phase
10 100 1k 10k 100k
Frequency [Hz]
180 160 140 120 100 80 60 40 20 0 -20 -40 -60 -80 -100 -120 -140 -160 -180
1
1M
The overview of frequency characteristic for DC/DC converter can be obtained in combination between LC filter and frequency characteristic of Error Amp as mentioned above. Note the following point in order to stabilize frequency characteristic of DC/DC converter. Cut-off frequency of DC/DC converter should be set to half or less of the triangular wave oscillator frequency.
Triangular wave oscillation frequency.
Note1) Review frequency characteristic of Error Amp when LC filter constant is changed. Note2) When the ceramic capacitor is used as smoothing capacitor CO, phase margin is reduced because ESR of the ceramic capacitor is extremely small as frequency characteristic of LC filter at low ESR. Therefore, change phase compensation of Error Amp or create resistance equivalent to ESR using pattern. * Method to obtain frequency characteristic of LC filter at low ESR
Frequency characteristic of power output LC filter (DC gain is included.)
90 80 70 60 50 40 30 20 10 0 -10 -20 -30 -40 -50 -60 -70 -80 -90
Gain
gain phase
Phase
180 160 140 120 100 80 60 40 20 0 -20 -40 -60 -80 -100 -120 -140 -160 -180
Phase [deg]
Gain [dB]
Cut-off frequency
f1 (Hz) = 2
Phase [deg]
1 Lo x Co x (Ro + ESR) (Ro + RL)
Gain [dB]
Lo = 15 H Co = 14.1 F Ro = 4.2 RL = 30 m ESR = 100 m
1
10
100
1k
10k
100k
1M
10M
Frequency [Hz]
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* 3Pole2Zero
DC/DC output
* Additional ESR
- +
Board Pattern or connected resistor
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PROCESSING WITHOUT USING OF THE CURRENT AMP1 AND AMP2
When Current Amp is not used, connect +INC1 terminal (pin 3) and -INC1 terminal (pin 2) to VCC terminal (pin 1) , connect +INC2 terminal (pin 10) and -INC2 terminal (pin 11) to VREF terminal (pin 19) , and then leave OUTC2 terminal (pin 9) open. * Connection when Current Amp is not used
2 11 1
-INC1 -INC2 VCC
+INC1 +INC2
3 10
19
VREF
"Open"
9
OUTC2
PROCESSING WITHOUT USING OF THE ERROR AMP1 AND AMP2
When Error Amp1 and Amp2 are not used, connect -INE1 terminal (pin 8) and -INE2 terminal (pin 13) to GND (pin 20) , and connect +INE1 terminal (pin 7) and +INE2 terminal (pin 12) to VREF terminal (pin 19) . * Connection when Error Amp is not used
7
+INE1
GND
20
12 +INE2 8 -INE1
13 -INE2
19 VREF
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PROCESSING WITHOUT USING OF THE CS TERMINAL
When soft-start function is not used, leave the CS terminal (pin 17) open. * Connection when no soft-start time is specified
"Open"
CS
17
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I/O EQUIVALENT CIRCUIT
* Reference voltage block
VCC 1 CTL 21 1.25 V + - 19 VREF 124.53 k 41.47 k GND 20
* Control block
ESD protection element
132.4 k 204 k GND
ESD protection element
* Bias voltage block
VCC 25 VB
* Soft-start block
VCC VREF (5.0 V) 17 CS
200 k
200 k
2.5 V
GND
GND
* Triangular wave oscillator block
VCC
* Error amplifier block (Error Amp1)
VCC
VREF (5.0 V) + - 18 RT GND
(3.1 V) CS -INE1 8 14 FB123
1.08 V
1M
GND 7 +INE1
* Error amplifier block (Error Amp2)
VCC
* Error amplifier block (Error Amp3)
VCC
(3.1 V) -INE2 13 FB123
(3.1 V) -INE3 15 4.2 V FB123
GND GND 12 +INE2
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(Continued) * Current detection amplifier block (Current Amp1)
VCC VREF VCC VREF
* Current detection amplifier block (Current Amp2)
+INC1 3
100 k
+INC2 10 -INE1
80 k
9 OUTC2
80 k 20 k GND 2 -INC1 GND 11 -INC2
20 k
* PWM comparator block
VREF
* Output block (Main side)
28 CB
* Output block (synchronous rectification side)
VB
* Invalidity current prevention block
16 OUTD 27 OUT-1 24 OUT-2
FB123 CTL GND GND 26 VS 23 PGND
GND
GND
* Constant voltage control state detection block
VREF (5.0 V)
* AC adapter voltage detection block
VREF (5.0 V)
FB123
6 CVM
ACIN 4
5 ACOK
22 XACOK
GND
GND
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APPLICATION EXAMPLE
R6 Q2-1 51k Q2-2 RS2 R39 16k R40 75k R41 16k 15m R15 24k ACIN 4 ACOK 5 22 XACOK 6 R34 100k CVM C21 0.1F R46 56k 1 VCC C8 0.1F System R45 100k Q5
+ -
Hi Side only 2.0V 3 2
- +
2.6V 0.1V 3.1V -INC2 (VO) 5.0V C7 VB 1.0F 25
+INC1 -INC1
+ x25 -
100k
+ -
VB Reg.
D4 A Q1-1 R2 15 Q1-2 D1 C2 4.7F C3 C4 C5 4.7F 4.7F 4.7F Battery L1 lchg VO B
CB 28 C6 0.1F OUT-1 Drive Logic Drv-1 27 VS 26 OUT-2 Drv-2 24 C1 4.7F PGND
VIN 8V ~ 25V
A B
-INE1 8 +INE1 7 C11 6800pF R20 R17 20k 10k -INE2 13 R32 100k OUTC2 9 C18 1500pF R51 R33 10 10k +INC2 10 C22 0.22F -INC2 11 R25 R26 R52 +INE2 12 10 9.1k15k C23 0.22F 14 FB123 R21 24k
SW4 SW3
- +
+ -
5.2H RS1 33m
-2.5 V -1.5 V
+ x24.5 -
- +
Off time Control 23 H: ULVO,UV release
R28 R27 R24 2k 16k 47k
R18 33k C12 330pF SW3 OFF ON ON SW4 OFF OFF ON lchg 4A 2A 0.4A
C13 22pF C14 22pF R8 300k -INE3 R10 100k OUTD
Output voltage (Battery voltage) is adjustable. 15 VCC UVLO VB UVLO VREF UVLO
- +
4.2V
Slope Control
16
VREF 10A CS C9 0.22F 17
+ -
2.6V OUTC2 0.3V CT 18 RT R19 39k VREF
+ -
VCC 21 CTL
+ -
0.2V
+INC2 -INC2 (VO) 4.2V bias [ VREF 5.0V 19 GND 20 DC/DC ON/OFF]
C10 0.1F
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PARTS LIST
Component M1 Q1-1, Q1-2 Q2-1, Q2-2 Q5 D1 D4 L1 C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C18 C21 C22 C23 RS1 RS2 R2 R6 R8 R10 R15 R17 R18 R19 R20 R21 R24 R25 R26 R27 Item IC N-ch FET P-ch FET P-ch FET Diode Diode Inductor Ceramic condenser Ceramic condenser Ceramic condenser Ceramic condenser Ceramic condenser Ceramic condenser Ceramic condenser Ceramic condenser Ceramic condenser Ceramic condenser Ceramic condenser Ceramic condenser Ceramic condenser Ceramic condenser Ceramic condenser Ceramic condenser Ceramic condenser Ceramic condenser Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Specification MB39A119 VDS = - 30 V, ID = 8 A (Max) VDS = - 30 V, ID = 8 A (Max) VDS = - 30 V, ID = 6 A (Max) VF = 0.35 V (Max) at IF = 0.5 A VF = 0.4 V (Max) at IF = 0.3 A 5.2 H, 22 m, 5.5 A 4.7 F (25 V) 4.7 F (25 V) 4.7 F (25 V) 4.7 F (25 V) 4.7 F (25 V) 0.1 F (50 V) 1.0 F (25 V) 0.1 F (50 V) 0.22 F (25 V) 0.1 F (50 V) 6800 pF (50 V) 330 pF (50 V) 22 pF (50 V) 22 pF (50 V) 1500 pF (50 V) 0.1 F (50 V) 0.22 F (25 V) 0.22 F (25 V) 33 m 15 m 15 51 k 300 k 100 k 24 k 10 k 33 k 39 k 20 k 24 k 47 k 9.1 k 15 k 16 k Vendor Fujitsu NEC NEC TOSHIBA ROHM SANYO SUMIDA TDK TDK TDK TDK TDK TDK TDK TDK TDK TDK TDK TDK TDK TDK TDK TDK TDK TDK KOA KOA ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm Package QFN-28P SO-8 SO-8 SO-8 TUMD2 1197A SMD 3216 3216 3216 3216 3216 1608 3216 1608 1608 1608 1608 1608 1608 1608 1608 1608 1608 1608 SL1 SL1 1608 1608 1608 1608 1608 1608 1608 1608 1608 1608 1608 1608 1608 1608 Parts No. MB39A119QN-G PA2752 PA1772 TPC8102 RSX051VA-30 SBS006 CDRH104R-5R2 C3216JB1E475K C3216JB1E475K C3216JB1E475K C3216JB1E475K C3216JB1E475K C1608JB1H104K C3216JB1E105K C1608JB1H104K C1608JB1E224K C1608JB1H104K C1608JB1H682K C1608CH1H331J C1608CH1H220J C1608CH1H220J C1608CH1H152J C1608JB1H104K C1608JB1E224K C1608JB1E224K SL1TTE33L0D SL1TTE15L0D RR0816P150D RR0816P513D RR0816P304D RR0816P104D RR0816P243D RR0816P103D RR0816P333D RR0816P393D RR0816P203D RR0816P243D RR0816P473D RR0816P912D RR0816P153D RR0816P163D (Continued) DS04-27247-3E 33
MB39A119
(Continued) Component R28 R32 R33 R34 R39 R40 R41 R45 R46 R51 R52
Item Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor
Specification 2 k 100 k 10 k 100 k 16 k 75 k 16 k 100 k 56 k 10 10
Vendor ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm
Package 1608 1608 1608 1608 1608 1608 1608 1608 1608 1608 1608
Parts No. RR0816P202D RR0816P104D RR0816P103D RR0816P104D RR0816P163D RR0816P753D RR0816P163D RR0816P104D RR0816P563D RR0816P100D RR0816P100D
Note : NEC : NEC corporation TOSHIBA : TOSHIBA CORPORATION ROHM : ROHM CO., LTD. SUMIDA : Sumida Corporation TDK : TDK Corporation KOA : KOA Corporation ssm : SUSUMU CO., LTD. SANYO : SANYO Electric Co., Ltd.
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SELECTION OF COMPONENTS
* N-ch MOS FET The N-ch MOS FET for switching use should be rated for at least +20% more than the input voltage. To minimize continuity loss, use a FET with low RDS (ON) between the drain and source. For high input voltage and high frequency operation, on-cycle switching loss will be higher so that power dissipation must be considered. In this application, the NEC PA2752 is used. Continuity loss, on/off switching loss and total loss are determined by the following formulas. The selection must ensure that peak drain current does not exceed rated values. Continuity loss : Pc PC = ID2 x RDS (ON) x Duty On-cycle switching loss : PS (ON) PS (ON) = VD (Max) x ID x tr x fosc 6
Off-cycle switching loss : PS (OFF) PS (OFF) = VD (Max) x ID (Max) x tf x fosc 6
Total loss : PT PT = PC + PS (ON) + PS (OFF) * Inductor In selecting inductors, it is of course essential not to apply more current than the rated capacity of the inductor, but also to note that the lower limit for ripple current is a critical point that if reached will cause discontinuous operation and a considerable drop in efficiency. This can be prevented by choosing a higher inductance value, which will enable continuous operation under light loads. Note that if the inductance value is too high, however, direct current resistance (DCR) is increased and this will also reduce efficiency. The inductance must be set at the point where efficiency is greatest. Note also that the DC superimposition characteristics become worse as the load current value approaches the rated current value of the inductor, so that the inductance value is reduced and ripple current increases, causing loss of efficiency. The selection of rated current value and inductance value will vary depending on where the point of peak efficiency lies with respect to load current. Inductance values are determined by the following formulas. The L value for all load current conditions is set so that the peak to peak value of the ripple current is 1/2 the load current or less.
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16.8 V output VIN = 24 V (Max) , VO = 16.8 V, IO = 4.0 A, fosc = 500 kHz
1. N-ch MOS FET (PA2752 : NEC product)
Main side VDS = 30 V, VGS = 20 V, ID = 8 A, RDS (ON) = 25 m (Typ) , Qg = 10 nC (Typ) Synchronous rectification side VDS = 30 V, VGS = 20 V, ID = 8 A, RDS (ON) = 25 m (Typ) , Qg = 10 nC (Typ) Drain current : Peak value The peak drain current of this FET must be within its rated current. If the FET's peak drain current is ID, it is obtained by the following formula. Main side ID Io + 4.0 + 4.97 A Synchronous rectification side ID Io + 4.0 + 4.97 A Vo 2L tOFF 16.8 2 x 5.2 x 10-6 x 1 500 x 103 x (1 - 0.7) VIN-Vo 2L tON x 1 500 x 103 x 0.7
24-16.8 2 x 5.2 x 10
-6
2. Inductor (CDRH104R-5R2 : SUMIDA product)
5.2 H (tolerance 30%) , rated current = 5.5 A L 2 (VIN-Vo) Io 4.0 tON x 1 500 x 103 x 0.7
2 x (24-16.8)
5.04 H
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The load current satisfying the continuous current condition Io Vo 2L 16.8 2 x 5.2 x 10
-6
tOFF x 1 500 x 10-3 x (1-0.7)
0.97 A Ripple current : Peak value The peak ripple current must be within the rated current of the inductor. If the peak ripple current is IL, it is obtained by the following formula. VIN-Vo IL IO tON 2L 4.0 + 4.97 A Ripple current : peak-to-peak value If the peak-to-peak ripple current is IL, it is obtained by the following formula. VIN-Vo IL = tON L = 24-16.8 5.2 x 10
-6
24-16.8 2 x 5.2 x 10-6
x
1 500 x 103
x
0.7
x
1 500 x 103
x
0.7
= 1.94 A :
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12.6 V output VIN = 20 V (Max) , VO = 12.6 V, IO = 4.0 A, fosc = 500 kHz
1. N-ch MOS FET (PA2752 : NEC product)
Main side VDS = 30 V, VGS = 20 V, ID = 8 A, RDS (ON) = 25 m (Typ) , Qg = 10 nC (Typ) Synchronous rectification side VDS = 30 V, VGS = 20 V, ID = 8 A, RDS (ON) = 25 m (Typ) , Qg = 10 nC (Typ) Drain current : Peak value The peak drain current of this FET must be within its rated current. If the FET's peak drain current is ID, it is obtained by the following formula. Main side ID Io + 4.0 + 4.90 A Synchronous rectification side ID Io + 4.0 + Vo 2L tOFF 12.6 2 x 5.2 x 10-6 x 1 500 x 103 x (1 - 0.63) VIN-Vo 2L tON x 1 500 x 103 x 0.63
20-12.6 2 x 5.2 x 10
-6
4.90 A
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2. Inductor (CDRH104R-5R2 : SUMIDA product)
5.2 H (tolerance 30%) , rated current = 5.5 A L 2 (VIN-Vo) Io 4.0 tON x 1 500 x 103 x 0.63
2 x (24-12.6)
4.67 H The load current satisfying the continuous current condition Io IL Vo 2L tOFF 12.6 2 x 5.2 x 10 897.0 mA VIN-Vo 2L
-6
x
1 500 x 103
x
(1-0.63)
IO
tON x 1 500 x 103 x 0.63
4.0 + 4.90 A
20-12.6 2 x 5.2 x 10-6
Ripple current : Peak-to-peak value If the peak-to-peak ripple current is IL, it is obtained by the following formula. VIN-Vo IL = tON L = 20-12.6 5.2 x -6 x 1 500 x 103 x 0.63
= 1.79 A :
3. Diode for bootstrap (SBS006 : SANYO product)
VR (DC reverse voltage) = 30 V, Average output current = 500 mA, peak surge current = 10 A VF (forward voltage) = 0.35 V, at IF = 300 mA VR : value that satisfies input voltage Efficiency is somewhat rising in low leak Schottky diode by the use but even if the signal diode is used, it is enough. It is recommended to use low VF. Also, capacitor for bootstrap must be very large than gate capacity of FET at main side. It is recommended to use the capacity of approximately 0.1 F to 1.0 F.
DS04-27247-3E
39
MB39A119
4. Charging current setting sense resistor (SL1TTE33L0F : KOA product)
33 m When + INE2 terminal (pin 12) voltage is 3.3 V, and the charging current (IO) is 4.0 A, R4 is obtained by the following formula. + INE2 R4 = 24.5 x IO = = : 3.3 24.5 x 4.0 33.0 m
5. Input current setting sense resistor (SL1TTE15L0F : KOA product)
15 m When + INE1 terminal (pin 7) voltage is 2.25 V, and the input current is 6.0 A, R1 is obtained by the following formula. + INE1 R1 = 25 x I1 = 2.25 25 x 6.0
= 15.0 m :
6. Switching P-ch FET (PA1772 : NEC product, TPC8102 : TOSHIBA product)
Q2-1, Q2-2, and Q5 must select an appropriate device according to the input current.
40
DS04-27247-3E
MB39A119
REFERENCE DATA
Conversion efficiency vs. Charging current (constant voltage mode)
100
Conversion efficiency (%)
95 90 85 80 75 70 65 60 55 50 0.01 0.1 1 10 VIN = 19 V VO = 16.8 V setting
Charging current IO (A) Conversion efficiency vs. Charging current (constant voltage mode) Conversion efficiency (%)
100 95 90 85 80 75 70 65 60 55 50 0.01 0.1 1 10 VIN = 16 V VO = 12.6 V setting
Charging current IO (A) Conversion efficiency vs. Charging voltage (constant current mode)
100
Conversion efficiency (%)
95 90 85 80 75 70 65 60 55 50 0 VIN = 19 V IO = 4 A setting
2
4
6
8
10
12
14
16
18
20
Charging voltage VO (V) (Continued) DS04-27247-3E 41
MB39A119
Conversion efficiency vs. Charging voltage (constant current mode)
100
Conversion efficiency (%)
95 90 85 80 75 70 65 60 55 50 0 VIN = 16 V IO = 4 A setting
2
4
6
8
10
12
14
16
18
20
Charging voltage VO (V) Charging voltage vs. Charging current
18
Charging voltage VO (V)
16 14 12 10 8 6 4 2 0 0.0 SW3 = ON SW4 = ON
VIN = 19 V VO = 16.8 V setting SW3 = ON SW4 = OFF SW3 = OFF SW4 = OFF
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
Charging current IO (A) Charging voltage vs. Charging current
18
Charging voltage VO (V)
16 14 12 10 8 6 4 2 0 0.0 SW3 = ON SW4 = ON SW3 = ON SW4 = OFF
VIN = 16 V VO = 12.6 V setting
SW3 = OFF SW4 = OFF
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
Charging current IO (A) (Continued) 42 DS04-27247-3E
MB39A119
Switching waveform (constant voltage mode)
OUT-1 (V) OUT-1 20 15 10 5 0 OUT-2 (V) 5 0 -5 0 OUT-2 VIN = 19 V VO = 16.8 V setting IO = 2 A SW3 = OFF SW4 = OFF
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0(s)
Switching waveform (constant current mode)
OUT-1 (V) OUT-1 20 15 10 5 0 OUT-2 (V) 5 0 -5 0 OUT-2 VIN = 19 V VO = 12 V IO = 4 A setting SW3 = OFF SW4 = OFF
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0(s)
Switching waveform (constant voltage mode)
VS (V)
20 15 10 5 0 -5
VIN = 19 V VO = 16.8 V setting IO = 2.0 A SW3 = OFF SW4 = OFF
VS
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0(s)
(Continued) DS04-27247-3E 43
MB39A119
Switching waveform (constant current mode)
VS (V) 20 15 10 5 0 -5 VS
VIN = 19 V VO = 12 V IO = 4.0 A setting SW3 = OFF SW4 = OFF
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0(s)
Oscillation frequency vs. Charging current
600
Oscillation frequency fOSC (kHz)
550 500 450 400 350 300 250 200 150 100 50 0 0.000
OUT-1
VIN = 19 V VO = 16.8 V setting OUT-2
1.000
2.000
3.000
4.000
5.000
Charging current IO (A) Oscillation frequency charging voltage vs. Input voltage
600 24.0 fosc VO 22.0 18.0 16.0 14.0 12.0 VO = 16.8 V setting RL = 10 10.0 8.0 6.0 4.0 2.0 17 18 19 20 21 22 23 24 0.0 25 20.0
Oscillation frequency fOSC (kHz)
550 500 450 400 350 300 250 200 150 100 50 0
Input voltage VIN (V) (Continued) 44 DS04-27247-3E
Charging voltage VO (V)
MB39A119
Soft-start operating waveform (constant current mode)
Vo (V) 18 Io (A) 5 4 3 2 1 Io 0 CTL 0 CVM Vo 16 14 CVM (V) 5
VIN = 19 V IO = 4 A setting SW3 = OFF SW4 = OFF
0 CTL (V) 10 0
4
8
12
16
20
24
28
32
36
40 (ms)
Soft-start operating waveform (constant current mode)
Vo (V) 18 Io (A) 5 4 3 CVM 2 1 0 CTL Vo 16 Io
VIN = 19 V IO = 4 A setting SW3 = OFF SW4 = OFF
14 CVM (V) 5 0 CTL (V) 10 0
0
4
8
12
16
20
24
28
32
36
40 (ms)
(Continued)
DS04-27247-3E
45
MB39A119
Soft-start operating waveform (constant voltage mode)
Vo (V) 18 Io (A) 5 4 3 2 1 Io 0 CTL 0 0 10 CVM Vo 16 14 CVM (V) 5
VIN = 19 V VO = 16.8 V setting SW3 = OFF SW4 = OFF
0 CTL (V)
4
8
12
16
20
24
28
32
36
40 (ms)
Soft-start operating waveform (constant voltage mode)
Vo (V) 18 Io (A) 5 4 3 CVM 2 Io 1 0 CTL CTL (V) 10 0 0 0 Vo 16
VIN = 19 V VO = 16.8 V setting SW3 = OFF SW4 = OFF
14 CVM (V) 5
4
8
12
16
20
24
28
32
36
40 (ms)
(Continued)
46
DS04-27247-3E
MB39A119
Load-step response operation waveform (C.V modeC.C mode)
Io (A) 6 5 4 3 2 1 Io 0
Vo
Vo (V) 18 16 14
VIN = 19 V IO = 4 A setting SW3 = OFF SW4 = OFF
0
2
4
6
8
10
12
14
16
18
20 (ms)
Load-step response operation waveform (C.C modeC.V mode)
Io (A) 6 5 Io 4 3 2 1 0
VIN = 19 V IO = 4 A setting SW3 = OFF SW4 = OFF
Vo
Vo (V) 18 16 14
0
2
4
6
8
10
12
14
16
18
20 (ms)
(Continued)
DS04-27247-3E
47
MB39A119
(Continued)
Load-step response operation waveform (C.V modeC.V mode)
Io (A) 6 5 4 3 2 1 Io 0
VIN = 19 V VO = 16.8 V setting SW3 = OFF SW4 = OFF
Vo
Vo (V) 18 16 14
0
2
4
6
8
10
12
14
16
18
20 (ms)
Load-step response operation waveform (C.V modeC.V mode)
Io (A) 6 5 4 3 2 1 0 Io
VIN = 19 V VO = 16.8V setting SW3 = OFF SW4 = OFF
Vo
Vo (V) 18 16 14
0
2
4
6
8
10
12
14
16
18
20 (ms)
48
DS04-27247-3E
MB39A119
LOOP CHARACTERISTICS
Gain, phase vs. Frequency
50 45 40 35 30 25 20 15 10 5 0 5 10 15 20 25 30 35 40 45 50 1.E+01
VIN = 19 V Setting VO = 16.8 V VO = 16.8 V (C.V mode) RL = 10
1.E+02
1.E+03
1.E+04
1.E+05
200 180 160 140 120 100 80 60 40 20 0 20 40 60 80 100 120 140 160 180 200 1.E+06
Frequency (Hz)
Gain, phase vs. Frequency
50 45 40 35 30 25 20 15 10 5 0 5 10 15 20 25 30 35 40 45 50 1.E+01 200 180 160 140 120 100 80 60 40 20 0 20 40 60 80 100 120 140 160 180 200 1.E+06
VIN = 16 V Setting VO = 8.4 V VO = 6 V (C.C mode) RL = 1.5
1.E+02
1.E+03
1.E+04
1.E+05
Frequency (Hz)
DS04-27247-3E
Phase (deg)
Gain (dB)
Phase (deg)
Gain (dB)
49
MB39A119
USAGE PRECAUTIONS
* Printed circuit board ground lines should be set up with consideration for common impedance. * Take appropriate static electricity measures. * Containers for semiconductor materials should have anti-static protection or be made of conductive material. * After mounting, printed circuit boards should be stored and shipped in conductive bags or containers. * Work platforms, tools, and instruments should be properly grounded. * Working personnel should be grounded with resistance of 250 k to 1 M between body and ground. * Do not apply negative voltages. * The use of negative voltages below -0.3 V may create parasitic transistors on LSI lines, which can cause abnormal operation.
ORDERING INFORMATION
Part number MB39A119QN Package 28-pin plastic QFN (LCC-28P-M12) Remarks
50
DS04-27247-3E
MB39A119
PACKAGE DIMENSION
28-pin plastic QFN Lead pitch Sealing method 0.50 mm Plastic mold
(LCC-28P-M12)
28-pin plastic QFN (LCC-28P-M12)
5.000.10 (.197.004)
3.500.10 (.138.004)
INDEX AREA
5.000.10 (.197.004)
3.500.10 (.138.004)
0.25 -0.03 +.002 (.010 -.001 )
+0.05
(3-R0.20) ((3-R.008)) 0.50(.020) (TYP)
0.400.10 (.016.004) 1PIN CORNER (C0.30(C.012))
0.08(.003) 0.00 (.000
C
+0.05 -0.00 +.002 -.000
0.85(.033) MAX 0.20(.008) )
2007-2008 FUJITSU MICROELECTRONICS LIMITED C28069S-c-1-2
Dimensions in mm (inches). Note: The values in parentheses are reference values.
Please confirm the latest Package dimension by following URL. http://edevice.fujitsu.com/package/en-search/
DS04-27247-3E
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MB39A119
FUJITSU MICROELECTRONICS LIMITED
Shinjuku Dai-Ichi Seimei Bldg. 7-1, Nishishinjuku 2-chome, Shinjuku-ku, Tokyo 163-0722, Japan Tel: +81-3-5322-3347 Fax: +81-3-5322-3387 http://jp.fujitsu.com/fml/en/ For further information please contact: North and South America FUJITSU MICROELECTRONICS AMERICA, INC. 1250 E. Arques Avenue, M/S 333 Sunnyvale, CA 94085-5401, U.S.A. Tel: +1-408-737-5600 Fax: +1-408-737-5999 http://www.fma.fujitsu.com/ Europe FUJITSU MICROELECTRONICS EUROPE GmbH Pittlerstrasse 47, 63225 Langen, Germany Tel: +49-6103-690-0 Fax: +49-6103-690-122 http://emea.fujitsu.com/microelectronics/ Korea FUJITSU MICROELECTRONICS KOREA LTD. 206 KOSMO TOWER, 1002 Daechi-Dong, Kangnam-Gu,Seoul 135-280 Korea Tel: +82-2-3484-7100 Fax: +82-2-3484-7111 http://www.fmk.fujitsu.com/ Asia Pacific FUJITSU MICROELECTRONICS ASIA PTE LTD. 151 Lorong Chuan, #05-08 New Tech Park, Singapore 556741 Tel: +65-6281-0770 Fax: +65-6281-0220 http://www.fujitsu.com/sg/services/micro/semiconductor/ FUJITSU MICROELECTRONICS SHANGHAI CO., LTD. Rm.3102, Bund Center, No.222 Yan An Road(E), Shanghai 200002, China Tel: +86-21-6335-1560 Fax: +86-21-6335-1605 http://cn.fujitsu.com/fmc/ FUJITSU MICROELECTRONICS PACIFIC ASIA LTD. 10/F., World Commerce Centre, 11 Canton Road Tsimshatsui, Kowloon Hong Kong Tel: +852-2377-0226 Fax: +852-2376-3269 http://cn.fujitsu.com/fmc/tw
All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with sales representatives before ordering. The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of FUJITSU MICROELECTRONICS device; FUJITSU MICROELECTRONICS does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating the device based on such information, you must assume any responsibility arising out of such use of the information. FUJITSU MICROELECTRONICS assumes no liability for any damages whatsoever arising out of the use of the information. Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use or exercise of any intellectual property right, such as patent right or copyright, or any other right of FUJITSU MICROELECTRONICS or any third party or does FUJITSU MICROELECTRONICS warrant non-infringement of any third-party's intellectual property right or other right by using such information. FUJITSU MICROELECTRONICS assumes no liability for any infringement of the intellectual property rights or other rights of third parties which would result from the use of information contained herein. The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). Please note that FUJITSU MICROELECTRONICS will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. Exportation/release of any products described in this document may require necessary procedures in accordance with the regulations of the Foreign Exchange and Foreign Trade Control Law of Japan and/or US export control laws. The company names and brand names herein are the trademarks or registered trademarks of their respective owners.
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